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ltc2632 1 2632fa block diagram features description dual 12-/10-/8-bit spi v out dacs with 10ppm/c reference the ltc ? 2632 is a family of dual 12-, 10-, and 8-bit voltage- output dacs with an integrated, high-accuracy, low-drift reference in an 8-lead tsot-23 package. it has rail-to-rail output buffers and is guaranteed monotonic. the ltc2632-l has a full-scale output of 2.5v, and o perates from a single 2.7v to 5.5v supply. the ltc2632-h has a full-scale output of 4.096v, and operates from a 4.5v to 5.5v supply. each dac can also operate with an external reference, which sets the full-scale output to the external reference voltage. these dacs communicate via a simple spi/microwire compatible 3-wire serial interface which operates at clock rates up to 50mhz. the ltc2632 incorporates a power-on reset circuit. options are available for reset to zero-scale or reset to mid-scale in internal reference mode, or reset to mid-scale in external reference mode after power-up. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents including 5396245, 5859606, 6891433, and 6937178. integral nonlinearity (ltc2632a-lz12) applications n integrated precision reference 2.5v full-scale 10ppm/c (ltc2632-l) 4.096v full-scale 10ppm/c (ltc2632-h) n maximum inl error: 1lsb (ltc2632a-12) n low noise: 0.75mv p-p 0.1hz to 200khz n guaranteed monotonic C40c to 125c automotive temperature range n selectable internal or external reference n 2.7v to 5.5v supply range (ltc2632-l) n low power operation 0.4ma at 3v n power-on-reset to zero-scale/mid-scale n double-buffered data latches n 8-lead thinsot? package n mobile communications n process control and industrial automation n automatic test equipment n portable equipment n automotive code 0 inl (lsb) 21 0 C1C2 1024 3072 2632 ta01 4095 2048 v cc = 3v internal ref. register internal reference register register power-on reset 32-bit shift register register control logic decode sck ref v ref 2632 bd cs /ld sdi v outa v cc v outb dac a dac b switch gnd downloaded from: http:///
ltc2632 2 2632fa pin configuration absolute maximum ratings supply voltage (v cc ) ................................... C0.3v to 6v sck, sdi ...................................................... C0.3v to 6v cs /ld (note 11) ............... C0.3v to min (v cc + 0.3v, 6v) v outa , v outb ................... C0.3v to min (v cc + 0.3v, 6v) ref .................................. C0.3v to min (v cc + 0.3v, 6v) operating temperature range ltc2632c ................................................ 0c to 70c ltc2632h (note 3) ............................ C40c to 125c maximum junction temperature .......................... 150c storage temperature range .................. C65c to 150c lead temperature (soldering, 10 sec) ................... 300c (notes 1, 2) 12 3 4 87 6 5 top view ts8 package 8-lead plastic tsot-23 sdiv cc v outb v outa sck cs /ld ref gnd t jmax = 150c (note 6), ja = 195c/w ltc2632 a c ts8 ?l z 12 #trm pbf lead free designator tape and reel tr = 2,500-piece tape and reel trm = 500-piece tape and reel resolution 12 = 12-bit 10 = 10-bit 8 = 8-bit power-on reset i = reset to mid-scale in internal reference mode x = reset to mid-scale in external reference mode (2632-l only) z = reset to zero-scale in internal reference mode full-scale voltage, internal reference mode l = 2.5v h = 4.096v package type ts8 = 8-lead plastic tsot-23 temperature grade c = commercial temperature range (0c to 70c) h = automotive temperature range (C40c to 125c) electrical grade (optional) a = 1lsb maximum inl (12-bit) product part number consult ltc marketing for information on non-standard lead based inish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speciications, go to: http://www.linear.com/tapeandreel/ order information downloaded from: http:///
ltc2632 3 2632fa product selection guide part number part marking * v fs with internal reference power-on reset to code power-on reference mode resolution v cc maximum inl ltc2632a-li12 ltc2632a-lx12 ltc2632a-lz12 ltc2632a-hi12 ltc2632a-hz12 ltfsj ltfsh ltfsg ltfsm ltfsk 2.5v ? (4095/4096)2.5v ? (4095/4096) 2.5v ? (4095/4096) 4.096v ? (4095/4096)4.096v ? (4095/4096) mid-scalemid-scale zero mid-scale zero internal external internalinternal internal 12-bit12-bit 12-bit 12-bit 12-bit 2.7v to 5.5v2.7v to 5.5v 2.7v to 5.5v 4.5v to 5.5v 4.5v to 5.5v 1lsb1lsb 1lsb 1lsb 1lsb ltc2632-li12 ltc2632-li10 ltc2632-li8 ltfsj ltfsq ltfsw 2.5v ? (4095/4096)2.5v ? (1023/1024) 2.5v ? (255/256) mid-scalemid-scale mid-scale internalinternal internal 12-bit10-bit 8-bit 2.7v to 5.5v2.7v to 5.5v 2.7v to 5.5v 2.5lsb 1lsb 0.5lsb ltc2632-lx12 ltc2632-lx10 ltc2632-lx8 ltfsh ltfsp ltfsv 2.5v ? (4095/4096)2.5v ? (1023/1024) 2.5v ? (255/256) mid-scalemid-scale mid-scale externalexternal external 12-bit10-bit 8-bit 2.7v to 5.5v2.7v to 5.5v 2.7v to 5.5v 2.5lsb 1lsb 0.5lsb ltc2632-lz12 ltc2632-lz10 ltc2632-lz8 ltfsg ltfsn ltfst 2.5v ? (4095/4096)2.5v ? (1023/1024) 2.5v ? (255/256) zerozero zero internalinternal internal 12-bit10-bit 8-bit 2.7v to 5.5v2.7v to 5.5v 2.7v to 5.5v 2.5lsb 1lsb 0.5lsb ltc2632-hi12 ltc2632-hi10 ltc2632-hi8 ltfsm ltfss ltfsy 4.096v ? (4095/4096) 4.096v ? (1023/1024) 4.096v ? (255/256) mid-scalemid-scale mid-scale internalinternal internal 12-bit10-bit 8-bit 4.5v to 5.5v4.5v to 5.5v 4.5v to 5.5v 2.5lsb 1lsb 0.5lsb ltc2632-hz12 ltc2632-hz10 ltc2632-hz8 ltfsk ltfsr ltfsx 4.096v ? (4095/4096)4.096v ? (1023/1024) 4.096v ? (255/256) zerozero zero internalinternal internal 12-bit10-bit 8-bit 4.5v to 5.5v4.5v to 5.5v 4.5v to 5.5v 2.5lsb 1lsb 0.5lsb * the temperature grade is identiied by a label on the shipping container. above options are available in an 8-lead tsot package (ltc2632xts8). downloaded from: http:///
ltc2632 4 2632fa electrical characteristics the l denotes the speci?cations which apply over the full operating temperature range, otherwise speci?cations are at t a = 25c. v cc = 2.7v to 5.5v, v out unloaded unless otherwise speci?ed. ltc2632-li12/-li10/-li8/-lx12/-lx10/-lx8/-lz12/-lz10/-lz8, ltc2632a-li12/-lx12/-lz12 (v fs = 2.5v) symbol parameter conditions ltc2632-8 ltc2632-10 ltc2632-12 ltc2632a-12 units min typ max min typ max min typ max min typ max dc performance resolution l 8 10 12 12 bits monotonicity v cc = 3v, internal ref. (note 4) l 8 10 12 12 bits dnl differential nonlinearity v cc = 3v, internal ref. (note 4) l 0.5 0.5 1 1 lsb inl integral nonlinearity v cc = 3v, internal ref. (note 4) l 0.05 0.5 0.2 1 1 2.5 0.5 1 lsb zse zero-scale error v cc = 3v, internal ref., code = 0 l 0.5 5 0.5 5 0.5 5 0.5 5 mv v os offset error v cc = 3v, internal ref. (note 5) l 0.5 5 0.5 5 0.5 5 0.5 5 mv v ostc v os temperature coeficient v cc = 3v, internal ref. 10 10 10 10 v/c ge gain error v cc = 3v, internal ref. l 0.2 0.8 0.2 0.8 0.2 0.8 0.2 0.8 %fsr ge tc gain temperature coeficient v cc = 3v, internal ref. (note 10) c-grade h-grade 10 10 10 10 10 10 10 10 ppm/c ppm/c load regulation internal ref., mid-scale, v cc = 3v10%, C5ma i out 5ma v cc = 5v10%, C10ma i out 10ma l l 0.009 0.009 0.016 0.016 0.035 0.035 0.064 0.064 0.14 0.14 0.256 0.256 0.14 0.14 0.256 0.256 lsb/ma lsb/ma r out dc output impedance internal ref., mid-scale, v cc = 3v10%, C5ma i out 5ma v cc = 5v10%, C10ma i out 10ma l l 0.09 0.09 0.156 0.156 0.09 0.09 0.156 0.156 0.09 0.09 0.156 0.156 0.09 0.09 0.156 0.156 ? ? symbol parameter conditions min typ max units v out dac output span external reference internal reference 0 to v ref 0 to 2.5 v v psr power supply rejection v cc = 3v10% or 5v10% C80 db i sc short-circuit output current (note 6) sinking sourcing v fs = v cc = 5.5v zero-scale; v out shorted to v cc full-scale; v out shorted to gnd l l 27 C28 48 C48 ma ma power supply v cc positive supply voltage for speciied performance l 2.7 5.5 v i cc supply current (note 7) v cc = 3v, v ref = 2.5v, external reference v cc = 3v, internal reference v cc = 5v v ref = 2.5v, external reference v cc = 5v, internal reference l l l l 0.3 0.4 0.3 0.4 0.5 0.6 0.5 0.6 ma ma ma ma i sd supply current in power-down mode (note 7) v cc = 5v l 0.5 2 a downloaded from: http:///
ltc2632 5 2632fa electrical characteristics the l denotes the speci?cations which apply over the full operating temperature range, otherwise speci?cations are at t a = 25c. v cc = 2.7v to 5.5v, v out unloaded unless otherwise speci?ed. ltc2632-li12/-li10/-li8/-lx12/-lx10/-lx8/-lz12/-lz10/-lz8, ltc2632a-li12/-lx12/-lz12 (v fs = 2.5v) symbol parameter conditions min typ max units reference input input voltage range l 1 v cc v resistance l 120 160 200 k? capacitance 12 pf i ref reference current, power-down mode dac powered down l 0.005 5.0 a reference output output voltage l 1.24 1.25 1.26 v reference temperature coeficient 10 ppm/c output impedance 0.5 k? capacitive load driving 10 f short-circuit current v cc = 5.5v, ref shorted to gnd 2.5 ma digital i/ov ih digital input high voltage v cc = 3.6v to 5.5v v cc = 2.7v to 3.6v l l 2.4 2.0 v v v il digital input low voltage v cc = 4.5v to 5.5v v cc = 2.7v to 4.5v l l 0.8 0.6 v v i lk digital input leakage v in = gnd to v cc l 1 a c in digital input capacitance (note 8) l 8 pf ac performancet s settling time v cc = 3v (note 9) 0.39% (1lsb at 8 bits) 0.098% (1lsb at 10 bits) 0.024% (1lsb at 12 bits) 3.5 3.9 4.4 s s s voltage output slew rate 1.0 v/s capacitive load driving 500 pf glitch impulse at mid-scale transition 2.8 nv?s dac-to-dac crosstalk 1 dac held at fs, 1 dac switch 0 to fs 4.5 nv?s multiplying bandwidth external reference 320 khz e n output voltage noise density at f = 1khz, external reference at f = 10khz, external reference at f = 1khz, internal reference at f = 10khz, internal reference 180 160 200 180 nv/ hz nv/ hz nv/ hz nv/ hz output voltage noise 0.1hz to 10hz, external reference 0.1hz to 10hz, internal reference 0.1hz to 200khz, external reference 0.1hz to 200khz, internal reference c ref = 0.1f 30 35 680 730 v p-p v p-p v p-p v p-p downloaded from: http:///
ltc2632 6 2632fa ltc2632-li12/-li10/-li8/-lx12/-lx10/-lx8/-lz12/-lz10/-lz8, ltc2632a-li12/-lx12/-lz12 (v fs = 2.5v) symbol parameter conditions min typ max units t 1 sdi valid to sck setup (figure 1) l 4 ns t 2 sdi valid to sck hold (figure 1) l 4 ns t 3 sck high time (figure 1) l 9 ns t 4 sck low time (figure 1) l 9 ns t 5 cs /ld pulse width (figure 1) l 10 ns t 6 lsb sck high to cs /ld high (figure 1) l 7 ns t 7 cs /ld low to sck high (figure 1) l 7 ns t 10 cs /ld high to sck positive edge (figure 1) l 7 ns sck frequency 50% duty cycle l 50 mhz timing characteristics the l denotes the speci?cations which apply over the full operating temperature range, otherwise speci?cations are at t a = 25c. v cc = 2.7v to 5.5v, v out unloaded unless otherwise speci?ed. downloaded from: http:///
ltc2632 7 2632fa electrical characteristics the l denotes the speci?cations which apply over the full operating temperature range, otherwise speci?cations are at t a = 25c. v cc = 4.5v to 5.5v, v out unloaded unless otherwise speci?ed. ltc2632-hi12/-hi10/-hi8/-hz12/-hz10/-hz8, ltc2632a-hi12/-hz12 (v fs = 4.096v) symbol parameter conditions ltc2632-8 ltc2632-10 ltc2632-12 ltc2632a-12 units min typ max min typ max min typ max min typ max dc performance resolution l 8 10 12 12 bits monotonicity v cc = 5v, internal ref. (note 4) l 8 10 12 12 bits dnl differential nonlinearity v cc = 5v, internal ref. (note 4) l 0.5 0.5 1 1 lsb inl integral nonlinearity v cc = 5v, internal ref. (note 4) l 0.05 0.5 0.2 1 1 2.5 0.5 1 lsb zse zero-scale error v cc = 5v, internal ref., code = 0 l 0.5 5 0.5 5 0.5 5 0.5 5 mv v os offset error v cc = 5v, internal ref. (note 5) l 0.5 5 0.5 5 0.5 5 0.5 5 mv v ostc v os temperature coeficient v cc = 5v, internal ref. 10 10 10 10 v/c ge gain error v cc = 5v, internal ref. l 0.2 0.8 0.2 0.8 0.2 0.8 0.2 0.8 %fsr ge tc gain temperature coeficient v cc = 5v, internal ref. (note 10) c-grade h-grade 10 10 10 10 10 10 10 10 ppm/c ppm/c load regulation v cc = 5v10%, internal ref. mid-scale, C10ma i out 10ma l 0.006 0.01 0.022 0.04 0.09 0.16 0.09 0.16 lsb/ ma r out dc output impedance v cc = 5v10%, internal ref. mid-scale, C10ma i out 10ma l 0.09 0.156 0.09 0.156 0.09 0.156 0.09 0.156 ? symbol parameter conditions min typ max units v out dac output span external reference internal reference 0 to v ref 0 to 4.096 v v psr power supply rejection v cc = 5v10% C80 db i sc short-circuit output current (note 6) sinking sourcing v fs = v cc = 5.5v zero-scale; v out shorted to v cc full-scale; v out shorted to gnd l l 27 C28 48 C48 ma ma power supply v cc positive supply voltage for speciied performance l 4.5 5.5 v i cc supply current (note 7) v cc = 5v, v ref = 4.096v, external reference v cc = 5v, internal reference l l 0.4 0.5 0.6 0.7 ma ma i sd supply current in power-down mode (note 7) v cc = 5v l 0.5 2 a downloaded from: http:///
ltc2632 8 2632fa electrical characteristics the l denotes the speci?cations which apply over the full operating temperature range, otherwise speci?cations are at t a = 25c. v cc = 4.5v to 5.5v, v out unloaded unless otherwise speci?ed. ltc2632-hi12/-hi10/-hi8/-hz12/-hz10/-hz8, ltc2632a-hi12/-hz12 (v fs = 4.096v) symbol parameter conditions min typ max units reference input input voltage range l 1 v cc v resistance l 120 160 200 k? capacitance 12 pf i ref reference current, power-down mode dac powered down l 0.005 5.0 a reference output output voltage l 2.032 2.048 2.064 v reference temperature coeficient 10 ppm/c output impedance 0.5 k? capacitive load driving 10 f short-circuit current v cc = 5.5v; ref shorted to gnd 4 ma digital i/ov ih digital input high voltage l 2.4 v v il digital input low voltage l 0.8 v i lk digital input leakage v in = gnd to v cc l 1 a c in digital input capacitance (note 8) l 8 pf ac performancet s settling time v cc = 5v (note 9) 0.39% (1lsb at 8 bits) 0.098% (1lsb at 10 bits) 0.024% (1lsb at 12 bits) 3.9 4.1 4.9 s s s voltage output slew rate 1.0 v/s capacitive load driving 500 pf glitch impulse at mid-scale transition 3.0 nv?s dac-to-dac crosstalk 1 dac held at fs, 1 dac switch 0 to fs 6.7 nv?s multiplying bandwidth external reference 320 khz e n output voltage noise density at f = 1khz, external reference at f = 10khz, external reference at f = 1khz, internal reference at f = 10khz, internal reference 180 160 250 230 nv/ hz nv/ hz nv/ hz nv/ hz output voltage noise 0.1hz to 10hz, external reference 0.1hz to 10hz, internal reference 0.1hz to 200khz, external reference 0.1hz to 200khz, internal reference c ref = 0.1f 30 40 680 750 v p-p v p-p v p-p v p-p downloaded from: http:///
ltc2632 9 2632fa timing characteristics the l denotes the speci?cations which apply over the full operating temperature range, otherwise speci?cations are at t a = 25c. v cc = 4.5v to 5.5v, v out unloaded unless otherwise speci?ed. ltc2632-hi12/-hi10/-hi8/-hz12/-hz10/-hz8, ltc2632a-hi12/-hz12 (v fs = 4.096v) symbol parameter conditions min typ max units t 1 sdi valid to sck setup (figure 1) l 4 ns t 2 sdi valid to sck hold (figure 1) l 4 ns t 3 sck high time (figure 1) l 9 ns t 4 sck low time (figure 1) l 9 ns t 5 cs /ld pulse width (figure 1) l 10 ns t 6 lsb sck high to cs /ld high (figure 1) l 7 ns t 7 cs /ld low to sck high (figure 1) l 7 ns t 10 cs /ld high to sck positive edge (figure 1) l 7 ns sck frequency 50% duty cycle l 50 mhz note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: all voltages are with respect to gnd note 3: high temperatures degrade operating lifetimes. operating lifetime is derated at temperatures greater than 105c.note 4: linearity and monotonicity are deined from code k l to code 2 n C1, where n is the resolution and k l is given by k l = 0.016?(2 n /v fs ), rounded to the nearest whole code. for v fs = 2.5v and n = 12, k l = 26 and linearity is deined from code 26 to code 4,095. for v fs = 4.096v and n = 12, k l = 16 and linearity is deined from code 16 to code 4,095. note 5: inferred from measurement at code 16 (ltc2632-12), code 4 (ltc2632-10) or code 1 (ltc2632-8), and at full-scale. note 6: this ic includes current limiting that is intended to protect the device during momentary overload conditions. junction temperature can exceed the rated maximum during current limiting. continuous operation above the speciied maximum operating junction temperature may impair device reliability. note 7: digital inputs at 0v or v cc . note 8: guaranteed by design and not production tested. note 9: internal reference mode. dac is stepped 1/4 scale to 3/4 scale and 3/4 scale to 1/4 scale. load is 2k in parallel with 100pf to gnd.note 10: temperature coeficient is calculated by dividing the maximum change in output voltage by the speciied temperature range.note 11: cs /ld can be held at high voltage as v cc ramps upon power-up. downloaded from: http:///
ltc2632 10 2632fa typical performance characteristics inl vs temperature dnl vs temperature reference output voltage vs temperature settling to 1lsb rising settling to 1lsb falling integral nonlinearity (inl) differential nonlinearity (dnl) t a = 25c, unless otherwise noted. ltc2632-l12 (internal reference, v fs = 2.5v) code 0 inl (lsb) 1.00.5 0 C0.5C1.0 1024 3072 2632 g01 4095 2048 v cc = 3v code 0 dnl (lsb) 1.00.5 0 C0.5C1.0 1024 3072 2632 g02 4095 2048 v cc = 3v 2s/div cs /ld 5v/div v out 1lsb/div 2632 g06 1/4 scale to 3/4 scale step v cc = 3v, v fs = 2.5v r l = 2k, c l = 100pf average of 256 events 3.3s 2s/div cs /ld 5v/div v out 1lsb/div 2632 g07 4.4s 3/4 scale to 1/4 scale step v cc = 3v, v fs = 2.5v r l = 2k, c l = 100pf average of 256 events temperature (c) C50 inl (lsb) 1.00.5 0 C0.5C1.0 C25 125 100 75 50 25 2632 g03 150 0 v cc = 3v inl (pos) inl (neg) temperature (c) C50 dnl (lsb) 1.00.5 0 C0.5C1.0 C25 125 100 75 50 25 2632 g04 150 0 v cc = 3v dnl (pos) dnl (neg) temperature (c) C50 v ref (v) 1.2601.255 1.250 1.245 1.240 C25 125 100 75 50 25 2632 g05 150 0 v cc = 3v downloaded from: http:///
ltc2632 11 2632fa typical performance characteristics t a = 25c, unless otherwise noted. ltc2632-h12 (internal reference, v fs = 4.096v) inl vs temperature dnl vs temperature reference output voltage vs temperature settling to 1lsb rising settling to 1lsb falling integral nonlinearity (inl) differential nonlinearity (dnl) code 0 inl (lsb) 1.00.5 0 C0.5C1.0 1024 3072 2632 g08 4095 2048 v cc = 5v code 0 dnl (lsb) 1.00.5 0 C0.5C1.0 1024 3072 2632 g09 4095 2048 v cc = 5v 2s/div cs /ld 5v/div v out 1lsb/div 2632 g13 4.1s 1/4 scale to 3/4 scale step v cc = 3v, v fs = 4.095v r l = 2k, c l = 100pf average of 256 events 2s/div cs /ld 5v/div v out 1lsb/div 2632 g14 4.9s 3/4 scale to 1/4 scale step v cc = 5v, v fs = 4.095v r l = 2k, c l = 100pf average of 256 events temperature (c) C50 inl (lsb) 1.00.5 0 C0.5C1.0 C25 125 100 75 50 25 2632 g10 150 0 v cc = 5v inl (pos) inl (neg) temperature (c) C50 dnl (lsb) 1.00.5 0 C0.5C1.0 C25 125 100 75 50 25 2632 g11 150 0 v cc = 5v dnl (pos) dnl (neg) temperature (c) C50 v ref (v) 2.0682.058 2.048 2.038 2.028 C25 125 100 75 50 25 2632 g12 150 0 v cc = 5v downloaded from: http:///
ltc2632 12 2632fa integral nonlinearity (inl) differential nonlinearity (dnl) load regulation current limiting offset error vs temperature integral nonlinearity (inl) differential nonlinearity (dnl) t a = 25c, unless otherwise noted. typical performance characteristics ltc2632-10 ltc2632-8 ltc2632 code 0 inl (lsb) 1.00.5 0 C0.5C1.0 256 768 2632 g15 1023 512 v cc = 3v v fs = 2.5v internal ref code 0 dnl (lsb) 1.00.5 0 C0.5C1.0 256 768 2632 g16 1023 512 v cc = 3v v fs = 2.5v internal ref code 0 inl (lsb) 0.500.25 0 C0.25C0.50 64 192 2632 g17 255 128 v cc = 3v v fs = 2.5v internal ref code 0 dnl (lsb) 0.500.25 0 C0.25C0.50 64 192 2632 g18 255 128 v cc = 3v v fs = 2.5v internal ref i out (ma) C30 ?v out (mv) 10 62 84 0 ?4 ?2?8 ?6 ?10 ?20 ?10 20 2632 g19 30 10 0 internal referencecode = mid-scale v cc = 5v (ltc2632-h) v cc = 5v (ltc2632-l) v cc = 3v (ltc2632-l) i out (ma) C30 ?v out (v) 0.200.15 0.05 0.10 0 ?0.05?0.15 ?0.10?0.20 ?20 ?10 20 2632 g20 30 10 0 internal referencecode = mid-scale v cc = 5v (ltc2632-h) v cc = 5v (ltc2632-l) v cc = 3v (ltc2632-l) temperature (c) C50 offset error (mv) 32 1 0 C1C2 C3 C25 125 100 75 50 25 2632 g21 150 0 downloaded from: http:///
ltc2632 13 2632fa headroom at rails vs output current exiting power-down to mid-scale power-on reset to mid-scale supply current vs logic voltage large-signal response mid-scale glitch impulse power-on reset glitch t a = 25c, unless otherwise noted. typical performance characteristics ltc2632 2s/div v out 0.5v/div 2632 g22 v fs = v cc = 5v 1/4 scale to 3/4 scale 2s/div cs /ld 5v/div v out 2mv/div 2632 g23 ltc2632-h12, v cc = 5v 3.0nv-s typ ltc2632-l12, v cc = 3v 2.8nv-s typ 200s/div v out 10mv/div v cc 2v/div 2632 g24 ltc2632-l zero-scale i out (ma) 0 v out (v) 5.04.0 3.0 4.53.5 2.5 1.5 2.00.5 1.0 0 2 1 3 8 2632 g25 10 6 9 7 4 5 5v sourcing 5v sinking 3v (ltc2632-l) sourcing 3v (ltc2632-l) sinking 5s/div v outa 0.5v/div cs /ld 5v/div 2632 g26 ltc2632-h v cc = 5v internal ref dac b inpower-down mode 200s/div v out 0.5v/div v cc 2v/div 2632 g27 ltc2632-h ltc2632-l logic voltage (v) 0 i cc (ma) 1.21.0 0.8 0.4 0.60.2 2 1 4 2632 g28 5 3 v cc = 3v (ltc2632-l) v cc = 5v sweep sck, sdi, cs /ld between 0v and v cc downloaded from: http:///
ltc2632 14 2632fa t a = 25c, unless otherwise noted. ltc2632 typical performance characteristics gain error vs reference input 0.1hz to 10hz voltage noise dac to dac crosstalk (dynamic) gain error vs temperature multiplying bandwidth noise voltage vs frequency frequency (hz) 1k db 20 C2C6 C4C8 C12 C10C16 C14C18 100k 2632 g29 1m 10k v cc = 5v v ref(dc) = 2v v ref(ac) = 0.2v p-p code = full-scale reference voltage (v) 1 2.5 2 gain error (%fsr) 0.80.4 0.6 0 0.2 C0.4C0.6 C0.2C0.8 4.5 2632 g31 5.5 3.5 1.5 4 5 3 v cc = 5.5v gain error of 2 channels 1s/div 10v/div 2632 g32 v cc = 5v, v fs = 2.5v code = mid-scaleinternal reference 2s/div v out 2mv/div 1 dac switch 0-fs 2v/div cs /ld 5v/div 2632 g33 ltc2632-h12, v cc = 5v 6.7nv-s typ temperature (c) C50 gain error (%fsr) 1.00.5 0 C0.5C1.0 C25 125 100 75 50 25 2634 g34 150 0 frequency (hz) 100 1k noise voltage (nv / hz ) 500300 400100 200 0 100k 2632 g30 1m 10k v cc = 5v code = mid-scaleinternal reference ltc2632-h ltc2632-l downloaded from: http:///
ltc2632 15 2632fa pin functions sck (pin 1): serial interface clock input. cmos and ttl compatible.cs /ld (pin 2): serial interface chip select/load input. when cs /ld is low, sck is enabled for shifting data on sdi into the register. when cs /ld is taken high, sck is disabled and the speciied command (see table 1) is executed. ref (pin 3): reference voltage input or output. when external reference mode is selected, ref is an input (1v v ref v cc ) where the voltage supplied sets the full-scale dac output voltage. when internal reference is selected, the 10ppm/c 1.25v (ltc2632-l) or 2.048v (ltc2632-h) internal reference (half full-scale) is available at the pin. this output may be bypassed to gnd with up to 10f (0.1f is recommended) and must be buffered when driving external dc load current. gnd (pin 4): ground. v out a, v out b (pins 5, 6): dac analog voltage output. v cc (pin 7): supply voltage input. 2.7v v cc 5.5v (ltc2632-l) or 4.5v v cc 5.5v (ltc2632-h). bypass to gnd with a 0.1f capacitor. sdi (pin 8): serial interface data input. data on sdi is clocked into the dac on the rising edge of sck. the ltc2632 accepts input word lengths of either 24 or 32 bits. downloaded from: http:///
ltc2632 16 2632fa block diagram timing diagram register internal reference register register power-on reset 32-bit shift register register control logic decode sck ref v ref 2632 bd cs /ld sdi v outa v cc v outb dac a dac b switch gnd sdi cs /ld sck t 2 t 10 t 5 t 7 t 6 t 1 t 3 t 4 1 2 3 23 24 2632 f01 figure 1. serial interface timing downloaded from: http:///
ltc2632 17 2632fa operation the ltc2632 is a family of dual voltage output dacs in an 8-lead tsot package. each dac can operate rail-to-rail using an external reference, or with its full-scale voltage set by an integrated reference. fifteen combinations of accuracy (12-, 10-, and 8-bit), power-on reset value (zero- scale, mid-scale in internal reference mode, or mid-scale in external reference mode), and full-scale voltage (2.5v or 4.096v) are available. the ltc2632 is controlled using a 3-wire spi/microwire compatible interface. power-on reset the ltc2632-hz/ltc2632-lz clear the output to zero-scale when power is irst applied, making system initialization consistent and repeatable. for some applications, downstream circuits are active during dac power-up, and may be sensitive to nonzero outputs from the dac during this time. the ltc2632 con - tains circuitry to reduce the power-on glitch: the analog output typically rises less than 10mv above zero-scale during power-on if the power supply is ramped to 5v in 1ms or more. in general, the glitch amplitude decreases as the power supply ramp time is increased. see power-on reset glitch in the typical performance characteristics section. the ltc2632-hi/ltc2632-li/ltc2632-lx provides an alternative reset, setting the output to mid-scale when power is irst applied. the ltc2632-li and ltc2632-hi power-up in internal reference mode, with the output set to a mid-scale voltage of 1.25v and 2.048v respectively. the ltc2632-lx powers up in external reference mode, with the output set to mid-scale of the external reference. default reference mode selection is described in the refer - ence modes section.power supply sequencing the voltage at ref (pin 3) must be kept within the range C0.3v v ref v cc + 0.3v (see the absolute maximum ratings section). particular care should be taken to observe these limits during power supply turn-on and turn-off sequences, when the voltage at v cc is in transition. transfer function the digital-to-analog transfer function is v out(ideal) = k 2 n ? ? ? ? ? ? ? v ref where k is the decimal equivalent of the binary dac input code, n is the resolution, and v ref is either 2.5v (ltc2632- li/ltc2632-lx/ltc2632-lz) or 4.096v (ltc2632-hi/ ltc2632-hz) when in internal reference mode, and the voltage at ref when in external reference mode. table 1. command codes command* c3 c2 c1 c0 0 0 0 0 write to input register n 0 0 0 1 update (power-up) dac register n 0 0 1 0 write to input register n, update (power-up) all 0 0 1 1 write to and update (power-up) dac register n 0 1 0 0 power-down n 0 1 0 1 power-down chip (all dacs and reference) 0 1 1 0 select internal reference (power-up reference) 0 1 1 1 select external reference (power-down internal reference) 1 1 1 1 no operation *command codes not shown are reserved and should not be used. table 2. address codes address ( n )* a3 a2 a1 a0 0 0 0 0 dac a 0 0 0 1 dac b 1 1 1 1 all dacs * address codes not shown are reserved and should not be used. downloaded from: http:///
ltc2632 18 2632fa operation serial interfacethe cs /ld input is level triggered. when this input is taken low, it acts as a chip-select signal, enabling the sdi and sck buffers and the input shift register. data (sdi input) is transferred at the next 24 rising sck edges. the 4-bit command, c3-c0, is loaded irst; then the 4-bit dac address, a3-a0; and inally the 16-bit data word. the data word comprises the 12-, 10- or 8-bit input code, ordered msb-to-lsb, followed by 4, 6 or 8 dont-care bits (ltc2632-12, ltc2632-10 and ltc2632-8 respectively; see figure 2). data can only be transferred to the device when the cs /ld signal is low, beginning on the irst rising edge of sck. sck may be high or low at the falling edge of cs /ld. the rising edge of cs /ld ends the data transfer and causes the device to execute the command speciied in the 24-bit input sequence. the complete sequence is shown in figure 3a. the command (c3-c0) and address (a3-a0) assignments are shown in tables 1 and 2. the irst four commands in table 1 consist of write and update operation. a write operation loads a 16-bit data word from the 24-bit shift register into the input register of the selected dac, n . an update operation copies the data word from the input register to the dac register. once copied into the dac register, the data word becomes the active 12-, 10-, or 8-bit input code, and is converted to an analog voltage at the dac output. write to and update combines the irst two commands. the update operation also powers up the dac if it had been in power-down mode. the data path and registers are shown in the block diagram. while the minimum input sequence is 24 bits, it may optionally be extended to 32 bits to accommodate micro- processors that have a minimum word width of 16 bits (2 bytes). to use the 32-bit width, 8 dont-care bits are trans - ferred to the device irst, followed by the 24-bit sequence described. figure 3b shows the 32-bit sequence. the 16-bit data word is ignored for all commands that do not include a write operation. 2632 f02 c3 c2 c1 c0 command input word (ltc2632-12) input word (ltc2632-10) a3 a2 a1 a0 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x x x address data (12 bits + 4 dont-care bits) c3 c2 c1 c0 command a3 a2 a1 a0 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x x x x x address data (10 bits + 6 dont-care bits) c3 c2 c1 c0 command a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 x x x x x x x x address msb lsb msb lsb msb lsb data (8 bits + 8 dont-care bits) input word (ltc2632-8) figure 2. command and data input format downloaded from: http:///
ltc2632 19 2632fa operation reference modes for applications where an accurate external reference is not available, nor desirable due to limited space, the ltc2632 has a user-selectable, integrated reference. the integrated reference voltage is internally ampliied by 2x to provide the full-scale dac output voltage range. the ltc2632-li/ ltc2632-lx/ltc2632-lz provides a full-scale output of 2.5v. the ltc2632-hi/ltc2632-hz provides a full-scale output of 4.096v. the internal reference can be useful in applications where the supply voltage is poorly regulated. internal reference mode can be selected by using com - mand 0110b, and is the power-on default for ltc2632-hz/ ltc2632-lz, as well as for ltc2632-hi/ltc2632-li. the 10ppm/c, 1.25v (ltc2632-li/ltc2632-lx/ltc2632- lz) or 2.048v (ltc2632-hi/ltc2632-hz) internal reference is available at the ref pin. adding bypass capacitance to the ref pin will improve noise performance; 0.1f is recommended, and up to 10f can be driven without oscillation. this output must be buffered when driving an external dc load current. alternatively, the dac can operate in external reference mode using command 0111b. in this mode, an input voltage supplied externally to the ref pin provides the reference (1v v ref v cc ) and the supply current is reduced. the external reference voltage supplied sets the full-scale dac output voltage. external reference mode is the power-on default for the ltc2632-lx. the reference mode of ltc2632-hz/ltc2632-lz/ltc2632- hi/ltc2632-li (internal reference power-on default), can be changed by software command after power-up. the same is true for the ltc2632-lx (external reference power-on default). power-down mode for power-constrained applications, power-down mode can be used to reduce the supply current whenever less than two dac outputs are needed. when in power-down, the buffer ampliiers, bias circuits, and integrated reference circuits are disabled, and draw essentially zero current. the dac outputs are put into a high-impedance state, and the output pins are passively pulled to ground through individual 200k resistors. input and dac-register contents are not disturbed during power-down. either channel or both channels can be put into power- down mode by using command 0100b in combination with the appropriate dac address ( n ). the supply current is reduced approximately 30% for each dac powered down. the integrated reference is automatically powered down when external reference is selected using command 0111b. in addition, all the dac channels and the integrated refer - ence together can be put into power-down mode using power-down chip command 0101b. when the integrated reference is in power-down mode, the ref pin becomes high impedance (typically > 1g). for all power-down commands the 16-bit data word is ignored. normal operation resumes after executing any command that includes a dac update (as shown in table 1). the se - lected dac is powered up as its voltage output is updated. when a dac which is in a powered-down state is powered up and updated, normal settling is delayed. if less than two dacs are in a powered-down state prior to the update command, the power-up delay time is 10s. however, if both dacs and the integrated reference are powered down, then the main bias generation circuit block has been auto - matically shut down in addition to the dac ampliiers and reference buffers. in this case, the power up delay time is 12s. the power-up of the integrated reference depends on the command that powered it down. if the reference is powered down using the select external reference com - mand (0111b), then it can only be powered back up using select internal reference command (0110b). however, if the reference was powered down using power-down chip command (0101b), then in addition to the select internal reference command (0110b), any command that powers up the dacs will also power-up the integrated reference. downloaded from: http:///
ltc2632 20 2632fa voltage output the ltc2632s integrated rail-to-rail ampliier has guar- anteed load regulation when sourcing or sinking up to 10ma at 5v, and 5ma at 3v. load regulation is a measure of the ampliiers ability to maintain the rated voltage accuracy over a wide range of load current. the measured change in output voltage per change in forced load current is expressed in lsb/ma. dc output impedance is equivalent to load regulation, and may be derived from it by simply calculating a change in units from lsb/ma to ohms. the ampliiers dc output impedance is 0.1 when driving a load well away from the rails. when drawing a load current from either rail, the output voltage headroom with respect to that rail is limited by the 50 typical channel resistance of the output devices (e.g., when sinking 1ma, the minimum output voltage is 50 ? 1ma, or 50mv). see the graph headroom at rails vs output current in the typical performance charac- teristics section. the ampliier is stable driving capacitive loads of up to 500pf. rail-to-rail output considerations in any rail-to-rail voltage output device, the output is lim- ited to voltages within the supply range. since the analog output of the dac cannot go below ground, it may limit for the lowest codes as shown in figure 4b. similarly, limiting can occur near full-scale when the ref pin is tied to v cc . if v ref = v cc and the dac full-scale error (fse) is positive, the output for the highest codes limits at v cc , as shown in figure 4c. no full-scale limiting can occur if v ref is less than v cc Cfse. offset and linearity are deined and tested over the region of the dac transfer function where no output limiting can occur. operation board layout the pc board should have separate areas for the analog and digital sections of the circuit. a single, solid ground plane should be used, with analog and digital signals carefully routed over separate areas of the plane. this keeps digital signals away from sensitive analog signals and minimizes the interaction between digital ground currents and the analog section of the ground plane. the resistance from the ltc2632 gnd pin to the ground plane should be as low as possible. resistance here will add directly to the effective dc output impedance of the device (typically 0.1). note that the ltc2632 is no more susceptible to this effect than any other parts of this type; on the con - trary, it allows layout-based performance improvements to shine rather than limiting attainable performance with excessive internal resistance. another technique for minimizing errors is to use a sepa- rate power ground return trace on another board layer. the trace should run between the point where the power supply is connected to the board and the dac ground pin. thus the dac ground pin becomes the common point for analog ground, digital ground, and power ground. when the ltc2632 is sinking large currents, this current lows out the ground pin and directly to the power ground trace without affecting the analog ground plane voltage. it is sometimes necessary to interrupt the ground plane to conine digital ground currents to the digital portion of the plane. when doing this, make the gap in the plane only as long as it needs to be to serve its purpose and ensure that no traces cross over the gap. bypass capacitors should be placed as close to the pins as possible with a low impedance path to gnd. downloaded from: http:///
ltc2632 21 2632fa operation figure 3a. ltc2632-12 24-bit load sequence (minimum input word) ltc2632-10 sdi data word: 10-bit input code + 6 don?t-care bits; ltc2632-8 sdi data word: 8-bit input code + 8 don?t-care bits figure 3b. ltc2632-12 32-bit load sequence ltc2632-10 sdi data word: 10-bit input code + 6 don?t-care bits; ltc2632-8 sdi data word: 8-bit input code + 8 don?t-care bits 2632 f03a c3 c2 c1 c0 command word a3 a2 a1 a0 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x x x address data word sdi sck cs /ld 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 24-bit input word 2632 f03b c3 c2 c1 c0 command word a3 a2 a1 a0 x x x x x x x x d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x x x 8 dont care bits address data word sdi sck cs /ld 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 26 27 28 29 30 31 32 25 32-bit input word downloaded from: http:///
ltc2632 22 2632fa operation 2632 f04 input code (b) output voltage negative offset 0v 0v 2,048 0 4,095 input code output voltage (a) v ref = v cc v ref = v cc (c) input code output voltage positivefse figure 4. effects of rail-to-rail operation on a dac transfer curve (shown for 12 bits) (a) overall transfer function (b) effect of negative offset for codes near zero (c) effect of positive full-scale error for codes near full-scale package description ts8 package 8-lead plastic tsot-23 (reference ltc dwg # 05-08-1637 rev a) 1.50 C 1.75 (note 4) 2.80 bsc 0.22 C 0.36 8 plcs (note 3) datum a 0.09 C 0.20 (note 3) ts8 tsot-23 0710 rev a 2.90 bsc (note 4) 0.65 bsc 1.95 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref pin one id note:1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.40 max 0.65 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref downloaded from: http:///
ltc2632 23 2632fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 3/11 revised part numbering 2 to 9, 17, 19, 24 downloaded from: http:///
ltc2632 24 2632fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2011 lt 0311 rev a ? printed in usa typical application part number description comments ltc1662 dual 10-bit ultralow power v out dac in 8-lead msop with external reference 1.5a per dac, 2.7v to 5.5v supply range, rail-to-rail output, spi serial interface ltc2602/ltc2612/ ltc2622 dual 16-/14-/12-bit v out dacs in 8-lead msop with external reference 300a per dac, 2.5v to 5.5v supply range, rail-to-rail output, spi serial interface ltc2607/ltc2617/ ltc2627 dual 16-/14-/12-bit v out dacs in 12-lead dfn with external reference 260a per dac, 2.7v to 5.5v supply range, rail-to-rail output, i 2 c serial interface ltc2630 single 12-/10-/8-bit v out dacs with 10ppm/c reference in sc70 180a per dac, 2.7v to 5.5v supply range, 10ppm/c reference, rail-to-rail output, spi serial interface ltc2631 single 12-/10-/8-bit i2c v out dacs with 10ppm/c reference in thinsot 180a per dac, 2.7v to 5.5v supply range, 10ppm/c reference, external ref mode, rail-to-rail output, i 2 c interface ltc2634 quad 12-/10-/8-bit v out dacs with 10ppm/c reference 125a per dac, 2.7v to 5.5v supply range, 10ppm/c reference, external ref mode, rail-to-rail output, spi interface ltc2636 octal 12-/10-/8-bit v out dacs with 10ppm/c reference 125a per dac, 2.7v to 5.5v supply range, 10ppm/c reference, external ref mode, rail-to-rail output, spi interface ltc2640 single 12-/10-/8-bit v out dacs with 10ppm/c reference in thinsot 180a per dac, 2.7v to 5.5v supply range, 10ppm/c reference, external ref mode, rail-to-rail output, spi interface ltc2654 quad 16-/12-bit v out dacs with 4 lsb inl, 1 lsb dnl 4mm 4mm qfn-20, ssop-16 packages, spi interface, internal 10ppm/c (max) reference related parts ltc2632 dacs adjust ltc2755-16 offset, ampli?ed with lt1991 pga to 5v C + dac a dac d ltc2755 r com1 r in1 outa C15v 15v r ofsa r fba r vosa gnd i out1a i out2a v dd 5v r efa C + 1/2 lt1469 1/2 lt1469 15v C15v dac c C15v 30k lt1634-1.25 serial bus dac a cs /ld sck 2632 ta02 0.1f gnd ltc2632ts8-li12 ref 5v 5v v cc sdi dac b m9m3 m1 out v out 6v lt1991 ref v ee v cc p1p3 p9 0.1f 0.1f 10v C10v dac b C + 0.1f lt6240 0.1f 0.1f 0.1f 0.1f 0.1f 0.1f 30pf 30pf 0.1f downloaded from: http:///

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